mmDMCU_RAM_ACCESS_CTRL_BASE_IDX 1243 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDMCU_RAM_ACCESS_CTRL_BASE_IDX                                                                2
mmDMCU_RAM_ACCESS_CTRL_BASE_IDX  957 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDMCU_RAM_ACCESS_CTRL_BASE_IDX                                                                2
mmDMCU_RAM_ACCESS_CTRL_BASE_IDX  625 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDMCU_RAM_ACCESS_CTRL_BASE_IDX                                                                2
mmDMCU_RAM_ACCESS_CTRL_BASE_IDX  587 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDMCU_RAM_ACCESS_CTRL_BASE_IDX                                                                2