mmDMCU_ERAM_WR_CTRL_BASE_IDX 1245 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDMCU_ERAM_WR_CTRL_BASE_IDX                                                                   2
mmDMCU_ERAM_WR_CTRL_BASE_IDX  959 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDMCU_ERAM_WR_CTRL_BASE_IDX                                                                   2
mmDMCU_ERAM_WR_CTRL_BASE_IDX  627 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDMCU_ERAM_WR_CTRL_BASE_IDX                                                                   2
mmDMCU_ERAM_WR_CTRL_BASE_IDX  589 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDMCU_ERAM_WR_CTRL_BASE_IDX                                                                   2