mmDISP_INTERRUPT_STATUS_CONTINUE20_BASE_IDX 1119 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDISP_INTERRUPT_STATUS_CONTINUE20_BASE_IDX                                                    2
mmDISP_INTERRUPT_STATUS_CONTINUE20_BASE_IDX  793 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDISP_INTERRUPT_STATUS_CONTINUE20_BASE_IDX                                                    2
mmDISP_INTERRUPT_STATUS_CONTINUE20_BASE_IDX  755 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDISP_INTERRUPT_STATUS_CONTINUE20_BASE_IDX                                                    2