mmDISPCLK_CGTT_BLK_CTRL_REG_BASE_IDX  751 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDISPCLK_CGTT_BLK_CTRL_REG_BASE_IDX                                                           1
mmDISPCLK_CGTT_BLK_CTRL_REG_BASE_IDX  551 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDISPCLK_CGTT_BLK_CTRL_REG_BASE_IDX                                                           1
mmDISPCLK_CGTT_BLK_CTRL_REG_BASE_IDX  195 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDISPCLK_CGTT_BLK_CTRL_REG_BASE_IDX                                                           1
mmDISPCLK_CGTT_BLK_CTRL_REG_BASE_IDX  209 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDISPCLK_CGTT_BLK_CTRL_REG_BASE_IDX                                                           1