mmDISPCLK_CGTT_BLK_CTRL_REG 1181 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDISPCLK_CGTT_BLK_CTRL_REG                                             0x135
mmDISPCLK_CGTT_BLK_CTRL_REG  991 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDISPCLK_CGTT_BLK_CTRL_REG                                             0x135
mmDISPCLK_CGTT_BLK_CTRL_REG 1062 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDISPCLK_CGTT_BLK_CTRL_REG                                             0x135
mmDISPCLK_CGTT_BLK_CTRL_REG  750 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDISPCLK_CGTT_BLK_CTRL_REG                                                                    0x0075
mmDISPCLK_CGTT_BLK_CTRL_REG 3001 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDISPCLK_CGTT_BLK_CTRL_REG 0x0135
mmDISPCLK_CGTT_BLK_CTRL_REG 1024 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDISPCLK_CGTT_BLK_CTRL_REG                                             0x135
mmDISPCLK_CGTT_BLK_CTRL_REG  550 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDISPCLK_CGTT_BLK_CTRL_REG                                                                    0x0075
mmDISPCLK_CGTT_BLK_CTRL_REG  194 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDISPCLK_CGTT_BLK_CTRL_REG                                                                    0x0075
mmDISPCLK_CGTT_BLK_CTRL_REG  208 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDISPCLK_CGTT_BLK_CTRL_REG                                                                    0x0075