mmDIG6_TMDS_STEREOSYNC_CTL_SEL_BASE_IDX 11879 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG6_TMDS_STEREOSYNC_CTL_SEL_BASE_IDX                                                        2
mmDIG6_TMDS_STEREOSYNC_CTL_SEL_BASE_IDX 10184 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG6_TMDS_STEREOSYNC_CTL_SEL_BASE_IDX                                                        2