mmDIG5_TMDS_DCBALANCER_CONTROL_BASE_IDX 11603 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG5_TMDS_DCBALANCER_CONTROL_BASE_IDX                                                        2
mmDIG5_TMDS_DCBALANCER_CONTROL_BASE_IDX 9882 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG5_TMDS_DCBALANCER_CONTROL_BASE_IDX                                                        2
mmDIG5_TMDS_DCBALANCER_CONTROL_BASE_IDX 12559 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG5_TMDS_DCBALANCER_CONTROL_BASE_IDX                                                        2