mmDIG5_TMDS_DCBALANCER_CONTROL 4248 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDIG5_TMDS_DCBALANCER_CONTROL                                          0x4f73
mmDIG5_TMDS_DCBALANCER_CONTROL 4193 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDIG5_TMDS_DCBALANCER_CONTROL                                          0x4f73
mmDIG5_TMDS_DCBALANCER_CONTROL 5424 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDIG5_TMDS_DCBALANCER_CONTROL                                          0x4f73
mmDIG5_TMDS_DCBALANCER_CONTROL 11602 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG5_TMDS_DCBALANCER_CONTROL                                                                 0x1df1
mmDIG5_TMDS_DCBALANCER_CONTROL 2983 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDIG5_TMDS_DCBALANCER_CONTROL 0x4B84
mmDIG5_TMDS_DCBALANCER_CONTROL 3469 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDIG5_TMDS_DCBALANCER_CONTROL                                          0x4b84
mmDIG5_TMDS_DCBALANCER_CONTROL 9881 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG5_TMDS_DCBALANCER_CONTROL                                                                 0x25db
mmDIG5_TMDS_DCBALANCER_CONTROL 12558 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG5_TMDS_DCBALANCER_CONTROL                                                                 0x25db