mmDIG5_TMDS_CTL0_1_GEN_CNTL 4256 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDIG5_TMDS_CTL0_1_GEN_CNTL                                             0x4f75
mmDIG5_TMDS_CTL0_1_GEN_CNTL 4203 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDIG5_TMDS_CTL0_1_GEN_CNTL                                             0x4f75
mmDIG5_TMDS_CTL0_1_GEN_CNTL 5434 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDIG5_TMDS_CTL0_1_GEN_CNTL                                             0x4f75
mmDIG5_TMDS_CTL0_1_GEN_CNTL 11604 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG5_TMDS_CTL0_1_GEN_CNTL                                                                    0x1df3
mmDIG5_TMDS_CTL0_1_GEN_CNTL 2980 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDIG5_TMDS_CTL0_1_GEN_CNTL 0x4B86
mmDIG5_TMDS_CTL0_1_GEN_CNTL 3477 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDIG5_TMDS_CTL0_1_GEN_CNTL                                             0x4b86
mmDIG5_TMDS_CTL0_1_GEN_CNTL 9883 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG5_TMDS_CTL0_1_GEN_CNTL                                                                    0x25dd
mmDIG5_TMDS_CTL0_1_GEN_CNTL 12562 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG5_TMDS_CTL0_1_GEN_CNTL                                                                    0x25dd