mmDIG5_HDMI_ACR_STATUS_1_BASE_IDX 11551 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG5_HDMI_ACR_STATUS_1_BASE_IDX                                                              2
mmDIG5_HDMI_ACR_STATUS_1_BASE_IDX 9830 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG5_HDMI_ACR_STATUS_1_BASE_IDX                                                              2
mmDIG5_HDMI_ACR_STATUS_1_BASE_IDX 12507 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG5_HDMI_ACR_STATUS_1_BASE_IDX                                                              2