mmDIG5_HDMI_ACR_PACKET_CONTROL_BASE_IDX 11471 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG5_HDMI_ACR_PACKET_CONTROL_BASE_IDX                                                        2
mmDIG5_HDMI_ACR_PACKET_CONTROL_BASE_IDX 9752 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG5_HDMI_ACR_PACKET_CONTROL_BASE_IDX                                                        2
mmDIG5_HDMI_ACR_PACKET_CONTROL_BASE_IDX 12427 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG5_HDMI_ACR_PACKET_CONTROL_BASE_IDX                                                        2