mmDIG5_HDMI_ACR_48_0_BASE_IDX 11545 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG5_HDMI_ACR_48_0_BASE_IDX                                                                  2
mmDIG5_HDMI_ACR_48_0_BASE_IDX 9824 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG5_HDMI_ACR_48_0_BASE_IDX                                                                  2
mmDIG5_HDMI_ACR_48_0_BASE_IDX 12501 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG5_HDMI_ACR_48_0_BASE_IDX                                                                  2