mmDIG5_HDMI_ACR_48_0 4000 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDIG5_HDMI_ACR_48_0                                                    0x4f32
mmDIG5_HDMI_ACR_48_0 3873 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDIG5_HDMI_ACR_48_0                                                    0x4f32
mmDIG5_HDMI_ACR_48_0 5104 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDIG5_HDMI_ACR_48_0                                                    0x4f32
mmDIG5_HDMI_ACR_48_0 11544 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG5_HDMI_ACR_48_0                                                                           0x1db0
mmDIG5_HDMI_ACR_48_0 2962 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDIG5_HDMI_ACR_48_0 0x4B3B
mmDIG5_HDMI_ACR_48_0 3221 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDIG5_HDMI_ACR_48_0                                                    0x4b3b
mmDIG5_HDMI_ACR_48_0 9823 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG5_HDMI_ACR_48_0                                                                           0x259a
mmDIG5_HDMI_ACR_48_0 12500 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG5_HDMI_ACR_48_0                                                                           0x259a