mmDIG5_HDMI_ACR_32_0 3968 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDIG5_HDMI_ACR_32_0                                                    0x4f2e
mmDIG5_HDMI_ACR_32_0 3833 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDIG5_HDMI_ACR_32_0                                                    0x4f2e
mmDIG5_HDMI_ACR_32_0 5064 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDIG5_HDMI_ACR_32_0                                                    0x4f2e
mmDIG5_HDMI_ACR_32_0 11536 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG5_HDMI_ACR_32_0                                                                           0x1dac
mmDIG5_HDMI_ACR_32_0 2958 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDIG5_HDMI_ACR_32_0 0x4B37
mmDIG5_HDMI_ACR_32_0 3189 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDIG5_HDMI_ACR_32_0                                                    0x4b37
mmDIG5_HDMI_ACR_32_0 9815 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG5_HDMI_ACR_32_0                                                                           0x2596
mmDIG5_HDMI_ACR_32_0 12492 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG5_HDMI_ACR_32_0                                                                           0x2596