mmDIG5_AFMT_RAMP_CONTROL3 4096 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDIG5_AFMT_RAMP_CONTROL3                                               0x4f3e
mmDIG5_AFMT_RAMP_CONTROL3 3993 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDIG5_AFMT_RAMP_CONTROL3                                               0x4f3e
mmDIG5_AFMT_RAMP_CONTROL3 5224 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDIG5_AFMT_RAMP_CONTROL3                                               0x4f3e
mmDIG5_AFMT_RAMP_CONTROL3 11568 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG5_AFMT_RAMP_CONTROL3                                                                      0x1dbc
mmDIG5_AFMT_RAMP_CONTROL3 2943 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDIG5_AFMT_RAMP_CONTROL3 0x4B47
mmDIG5_AFMT_RAMP_CONTROL3 3317 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDIG5_AFMT_RAMP_CONTROL3                                               0x4b47
mmDIG5_AFMT_RAMP_CONTROL3 9847 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG5_AFMT_RAMP_CONTROL3                                                                      0x25a6
mmDIG5_AFMT_RAMP_CONTROL3 12524 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG5_AFMT_RAMP_CONTROL3                                                                      0x25a6