mmDIG5_AFMT_RAMP_CONTROL1 4080 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDIG5_AFMT_RAMP_CONTROL1                                               0x4f3c
mmDIG5_AFMT_RAMP_CONTROL1 3973 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDIG5_AFMT_RAMP_CONTROL1                                               0x4f3c
mmDIG5_AFMT_RAMP_CONTROL1 5204 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDIG5_AFMT_RAMP_CONTROL1                                               0x4f3c
mmDIG5_AFMT_RAMP_CONTROL1 11564 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG5_AFMT_RAMP_CONTROL1                                                                      0x1dba
mmDIG5_AFMT_RAMP_CONTROL1 2941 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDIG5_AFMT_RAMP_CONTROL1 0x4B45
mmDIG5_AFMT_RAMP_CONTROL1 3301 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDIG5_AFMT_RAMP_CONTROL1                                               0x4b45
mmDIG5_AFMT_RAMP_CONTROL1 9843 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG5_AFMT_RAMP_CONTROL1                                                                      0x25a4
mmDIG5_AFMT_RAMP_CONTROL1 12520 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG5_AFMT_RAMP_CONTROL1                                                                      0x25a4