mmDIG1_TMDS_DCBALANCER_CONTROL 4244 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDIG1_TMDS_DCBALANCER_CONTROL                                          0x4b73
mmDIG1_TMDS_DCBALANCER_CONTROL 4189 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDIG1_TMDS_DCBALANCER_CONTROL                                          0x4b73
mmDIG1_TMDS_DCBALANCER_CONTROL 5420 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDIG1_TMDS_DCBALANCER_CONTROL                                          0x4b73
mmDIG1_TMDS_DCBALANCER_CONTROL 10466 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG1_TMDS_DCBALANCER_CONTROL                                                                 0x19f1
mmDIG1_TMDS_DCBALANCER_CONTROL 2643 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDIG1_TMDS_DCBALANCER_CONTROL 0x1F84
mmDIG1_TMDS_DCBALANCER_CONTROL 3465 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDIG1_TMDS_DCBALANCER_CONTROL                                          0x1f84
mmDIG1_TMDS_DCBALANCER_CONTROL 8641 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG1_TMDS_DCBALANCER_CONTROL                                                                 0x21db
mmDIG1_TMDS_DCBALANCER_CONTROL 11246 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG1_TMDS_DCBALANCER_CONTROL                                                                 0x21db
mmDIG1_TMDS_DCBALANCER_CONTROL 10152 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDIG1_TMDS_DCBALANCER_CONTROL                                                                 0x21db