mmDIG1_TMDS_CTL_BITS_BASE_IDX 10465 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG1_TMDS_CTL_BITS_BASE_IDX                                                                  2
mmDIG1_TMDS_CTL_BITS_BASE_IDX 8640 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG1_TMDS_CTL_BITS_BASE_IDX                                                                  2
mmDIG1_TMDS_CTL_BITS_BASE_IDX 11245 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG1_TMDS_CTL_BITS_BASE_IDX                                                                  2
mmDIG1_TMDS_CTL_BITS_BASE_IDX 10151 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDIG1_TMDS_CTL_BITS_BASE_IDX                                                                  2