mmDIG1_TMDS_CTL_BITS 4236 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDIG1_TMDS_CTL_BITS                                                    0x4b72
mmDIG1_TMDS_CTL_BITS 4179 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDIG1_TMDS_CTL_BITS                                                    0x4b72
mmDIG1_TMDS_CTL_BITS 5410 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDIG1_TMDS_CTL_BITS                                                    0x4b72
mmDIG1_TMDS_CTL_BITS 10464 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG1_TMDS_CTL_BITS                                                                           0x19f0
mmDIG1_TMDS_CTL_BITS 2642 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDIG1_TMDS_CTL_BITS 0x1F83
mmDIG1_TMDS_CTL_BITS 3457 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDIG1_TMDS_CTL_BITS                                                    0x1f83
mmDIG1_TMDS_CTL_BITS 8639 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG1_TMDS_CTL_BITS                                                                           0x21da
mmDIG1_TMDS_CTL_BITS 11244 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG1_TMDS_CTL_BITS                                                                           0x21da
mmDIG1_TMDS_CTL_BITS 10150 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDIG1_TMDS_CTL_BITS                                                                           0x21da