mmDIG1_TMDS_CTL2_3_GEN_CNTL 4260 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDIG1_TMDS_CTL2_3_GEN_CNTL                                             0x4b76
mmDIG1_TMDS_CTL2_3_GEN_CNTL 4209 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDIG1_TMDS_CTL2_3_GEN_CNTL                                             0x4b76
mmDIG1_TMDS_CTL2_3_GEN_CNTL 5440 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDIG1_TMDS_CTL2_3_GEN_CNTL                                             0x4b76
mmDIG1_TMDS_CTL2_3_GEN_CNTL 10470 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG1_TMDS_CTL2_3_GEN_CNTL                                                                    0x19f4
mmDIG1_TMDS_CTL2_3_GEN_CNTL 2641 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDIG1_TMDS_CTL2_3_GEN_CNTL 0x1F87
mmDIG1_TMDS_CTL2_3_GEN_CNTL 3481 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDIG1_TMDS_CTL2_3_GEN_CNTL                                             0x1f87
mmDIG1_TMDS_CTL2_3_GEN_CNTL 8645 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG1_TMDS_CTL2_3_GEN_CNTL                                                                    0x21de
mmDIG1_TMDS_CTL2_3_GEN_CNTL 11252 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG1_TMDS_CTL2_3_GEN_CNTL                                                                    0x21de
mmDIG1_TMDS_CTL2_3_GEN_CNTL 10158 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDIG1_TMDS_CTL2_3_GEN_CNTL                                                                    0x21de