mmDIG1_TMDS_CTL0_1_GEN_CNTL 4252 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDIG1_TMDS_CTL0_1_GEN_CNTL                                             0x4b75
mmDIG1_TMDS_CTL0_1_GEN_CNTL 4199 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDIG1_TMDS_CTL0_1_GEN_CNTL                                             0x4b75
mmDIG1_TMDS_CTL0_1_GEN_CNTL 5430 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDIG1_TMDS_CTL0_1_GEN_CNTL                                             0x4b75
mmDIG1_TMDS_CTL0_1_GEN_CNTL 10468 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG1_TMDS_CTL0_1_GEN_CNTL                                                                    0x19f3
mmDIG1_TMDS_CTL0_1_GEN_CNTL 2640 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDIG1_TMDS_CTL0_1_GEN_CNTL 0x1F86
mmDIG1_TMDS_CTL0_1_GEN_CNTL 3473 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDIG1_TMDS_CTL0_1_GEN_CNTL                                             0x1f86
mmDIG1_TMDS_CTL0_1_GEN_CNTL 8643 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG1_TMDS_CTL0_1_GEN_CNTL                                                                    0x21dd
mmDIG1_TMDS_CTL0_1_GEN_CNTL 11250 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG1_TMDS_CTL0_1_GEN_CNTL                                                                    0x21dd
mmDIG1_TMDS_CTL0_1_GEN_CNTL 10156 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDIG1_TMDS_CTL0_1_GEN_CNTL                                                                    0x21dd