mmDIG1_TMDS_CONTROL_CHAR 4188 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDIG1_TMDS_CONTROL_CHAR                                                0x4b6c
mmDIG1_TMDS_CONTROL_CHAR 4119 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDIG1_TMDS_CONTROL_CHAR                                                0x4b6c
mmDIG1_TMDS_CONTROL_CHAR 5350 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDIG1_TMDS_CONTROL_CHAR                                                0x4b6c
mmDIG1_TMDS_CONTROL_CHAR 10454 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG1_TMDS_CONTROL_CHAR                                                                       0x19ea
mmDIG1_TMDS_CONTROL_CHAR 2639 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDIG1_TMDS_CONTROL_CHAR 0x1F7D
mmDIG1_TMDS_CONTROL_CHAR 3409 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDIG1_TMDS_CONTROL_CHAR                                                0x1f7d
mmDIG1_TMDS_CONTROL_CHAR 8629 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG1_TMDS_CONTROL_CHAR                                                                       0x21d4
mmDIG1_TMDS_CONTROL_CHAR 11234 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG1_TMDS_CONTROL_CHAR                                                                       0x21d4
mmDIG1_TMDS_CONTROL_CHAR 10140 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDIG1_TMDS_CONTROL_CHAR                                                                       0x21d4