mmDIG1_TMDS_CNTL_BASE_IDX 10453 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG1_TMDS_CNTL_BASE_IDX                                                                      2
mmDIG1_TMDS_CNTL_BASE_IDX 8628 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG1_TMDS_CNTL_BASE_IDX                                                                      2
mmDIG1_TMDS_CNTL_BASE_IDX 11233 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG1_TMDS_CNTL_BASE_IDX                                                                      2
mmDIG1_TMDS_CNTL_BASE_IDX 10139 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDIG1_TMDS_CNTL_BASE_IDX                                                                      2