mmDIG1_HDMI_GC_BASE_IDX 10347 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG1_HDMI_GC_BASE_IDX                                                                        2
mmDIG1_HDMI_GC_BASE_IDX 8524 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG1_HDMI_GC_BASE_IDX                                                                        2
mmDIG1_HDMI_GC_BASE_IDX 11127 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG1_HDMI_GC_BASE_IDX                                                                        2
mmDIG1_HDMI_GC_BASE_IDX 10033 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDIG1_HDMI_GC_BASE_IDX                                                                        2