mmDIG1_HDMI_CONTROL_BASE_IDX 10329 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG1_HDMI_CONTROL_BASE_IDX                                                                   2
mmDIG1_HDMI_CONTROL_BASE_IDX 8506 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG1_HDMI_CONTROL_BASE_IDX                                                                   2
mmDIG1_HDMI_CONTROL_BASE_IDX 11109 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG1_HDMI_CONTROL_BASE_IDX                                                                   2
mmDIG1_HDMI_CONTROL_BASE_IDX 10015 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDIG1_HDMI_CONTROL_BASE_IDX                                                                   2