mmDIG1_HDMI_ACR_32_0_BASE_IDX 10401 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG1_HDMI_ACR_32_0_BASE_IDX                                                                  2
mmDIG1_HDMI_ACR_32_0_BASE_IDX 8576 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG1_HDMI_ACR_32_0_BASE_IDX                                                                  2
mmDIG1_HDMI_ACR_32_0_BASE_IDX 11181 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG1_HDMI_ACR_32_0_BASE_IDX                                                                  2
mmDIG1_HDMI_ACR_32_0_BASE_IDX 10087 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDIG1_HDMI_ACR_32_0_BASE_IDX                                                                  2