mmDIG1_AFMT_STATUS 4116 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDIG1_AFMT_STATUS                                                      0x4b41
mmDIG1_AFMT_STATUS 4019 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDIG1_AFMT_STATUS                                                      0x4b41
mmDIG1_AFMT_STATUS 5250 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDIG1_AFMT_STATUS                                                      0x4b41
mmDIG1_AFMT_STATUS 10438 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG1_AFMT_STATUS                                                                             0x19bf
mmDIG1_AFMT_STATUS 2604 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDIG1_AFMT_STATUS 0x1F4A
mmDIG1_AFMT_STATUS 3337 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDIG1_AFMT_STATUS                                                      0x1f4a
mmDIG1_AFMT_STATUS 8613 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG1_AFMT_STATUS                                                                             0x21a9
mmDIG1_AFMT_STATUS 11218 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG1_AFMT_STATUS                                                                             0x21a9
mmDIG1_AFMT_STATUS 10124 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDIG1_AFMT_STATUS                                                                             0x21a9