mmDIG0_TMDS_DCBALANCER_CONTROL 4243 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDIG0_TMDS_DCBALANCER_CONTROL                                          0x4a73
mmDIG0_TMDS_DCBALANCER_CONTROL 4188 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDIG0_TMDS_DCBALANCER_CONTROL                                          0x4a73
mmDIG0_TMDS_DCBALANCER_CONTROL 5419 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDIG0_TMDS_DCBALANCER_CONTROL                                          0x4a73
mmDIG0_TMDS_DCBALANCER_CONTROL 10182 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG0_TMDS_DCBALANCER_CONTROL                                                                 0x18f1
mmDIG0_TMDS_DCBALANCER_CONTROL 2558 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDIG0_TMDS_DCBALANCER_CONTROL 0x1C84
mmDIG0_TMDS_DCBALANCER_CONTROL 3464 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDIG0_TMDS_DCBALANCER_CONTROL                                          0x1c84
mmDIG0_TMDS_DCBALANCER_CONTROL 8331 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG0_TMDS_DCBALANCER_CONTROL                                                                 0x20db
mmDIG0_TMDS_DCBALANCER_CONTROL 10918 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG0_TMDS_DCBALANCER_CONTROL                                                                 0x20db
mmDIG0_TMDS_DCBALANCER_CONTROL 9824 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDIG0_TMDS_DCBALANCER_CONTROL                                                                 0x20db