mmDIG0_TMDS_CTL_BITS_BASE_IDX 10181 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG0_TMDS_CTL_BITS_BASE_IDX                                                                  2
mmDIG0_TMDS_CTL_BITS_BASE_IDX 8330 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG0_TMDS_CTL_BITS_BASE_IDX                                                                  2
mmDIG0_TMDS_CTL_BITS_BASE_IDX 10917 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG0_TMDS_CTL_BITS_BASE_IDX                                                                  2
mmDIG0_TMDS_CTL_BITS_BASE_IDX 9823 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDIG0_TMDS_CTL_BITS_BASE_IDX                                                                  2