mmDIG0_TMDS_CTL_BITS 4235 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDIG0_TMDS_CTL_BITS                                                    0x4a72
mmDIG0_TMDS_CTL_BITS 4178 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDIG0_TMDS_CTL_BITS                                                    0x4a72
mmDIG0_TMDS_CTL_BITS 5409 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDIG0_TMDS_CTL_BITS                                                    0x4a72
mmDIG0_TMDS_CTL_BITS 10180 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG0_TMDS_CTL_BITS                                                                           0x18f0
mmDIG0_TMDS_CTL_BITS 2557 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDIG0_TMDS_CTL_BITS 0x1C83
mmDIG0_TMDS_CTL_BITS 3456 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDIG0_TMDS_CTL_BITS                                                    0x1c83
mmDIG0_TMDS_CTL_BITS 8329 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG0_TMDS_CTL_BITS                                                                           0x20da
mmDIG0_TMDS_CTL_BITS 10916 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG0_TMDS_CTL_BITS                                                                           0x20da
mmDIG0_TMDS_CTL_BITS 9822 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDIG0_TMDS_CTL_BITS                                                                           0x20da