mmDIG0_TMDS_CTL0_1_GEN_CNTL 4251 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDIG0_TMDS_CTL0_1_GEN_CNTL                                             0x4a75
mmDIG0_TMDS_CTL0_1_GEN_CNTL 4198 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDIG0_TMDS_CTL0_1_GEN_CNTL                                             0x4a75
mmDIG0_TMDS_CTL0_1_GEN_CNTL 5429 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDIG0_TMDS_CTL0_1_GEN_CNTL                                             0x4a75
mmDIG0_TMDS_CTL0_1_GEN_CNTL 10184 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG0_TMDS_CTL0_1_GEN_CNTL                                                                    0x18f3
mmDIG0_TMDS_CTL0_1_GEN_CNTL 2555 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDIG0_TMDS_CTL0_1_GEN_CNTL 0x1C86
mmDIG0_TMDS_CTL0_1_GEN_CNTL 3472 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDIG0_TMDS_CTL0_1_GEN_CNTL                                             0x1c86
mmDIG0_TMDS_CTL0_1_GEN_CNTL 8333 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG0_TMDS_CTL0_1_GEN_CNTL                                                                    0x20dd
mmDIG0_TMDS_CTL0_1_GEN_CNTL 10922 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG0_TMDS_CTL0_1_GEN_CNTL                                                                    0x20dd
mmDIG0_TMDS_CTL0_1_GEN_CNTL 9828 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDIG0_TMDS_CTL0_1_GEN_CNTL                                                                    0x20dd