mmDIG0_HDMI_STATUS_BASE_IDX 10047 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG0_HDMI_STATUS_BASE_IDX                                                                    2
mmDIG0_HDMI_STATUS_BASE_IDX 8198 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG0_HDMI_STATUS_BASE_IDX                                                                    2
mmDIG0_HDMI_STATUS_BASE_IDX 10783 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG0_HDMI_STATUS_BASE_IDX                                                                    2
mmDIG0_HDMI_STATUS_BASE_IDX 9689 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDIG0_HDMI_STATUS_BASE_IDX                                                                    2