mmDIG0_HDMI_CONTROL 3675 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDIG0_HDMI_CONTROL                                                     0x4a09
mmDIG0_HDMI_CONTROL 3468 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDIG0_HDMI_CONTROL                                                     0x4a09
mmDIG0_HDMI_CONTROL 4699 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDIG0_HDMI_CONTROL                                                     0x4a09
mmDIG0_HDMI_CONTROL 10044 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG0_HDMI_CONTROL                                                                            0x1887
mmDIG0_HDMI_CONTROL 2543 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDIG0_HDMI_CONTROL 0x1C0C
mmDIG0_HDMI_CONTROL 2896 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDIG0_HDMI_CONTROL                                                     0x1c0c
mmDIG0_HDMI_CONTROL 8195 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG0_HDMI_CONTROL                                                                            0x2071
mmDIG0_HDMI_CONTROL 10780 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG0_HDMI_CONTROL                                                                            0x2071
mmDIG0_HDMI_CONTROL 9686 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDIG0_HDMI_CONTROL                                                                            0x2071