mmDIG0_AFMT_RAMP_CONTROL1_BASE_IDX 10145 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDIG0_AFMT_RAMP_CONTROL1_BASE_IDX                                                             2
mmDIG0_AFMT_RAMP_CONTROL1_BASE_IDX 8294 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDIG0_AFMT_RAMP_CONTROL1_BASE_IDX                                                             2
mmDIG0_AFMT_RAMP_CONTROL1_BASE_IDX 10881 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDIG0_AFMT_RAMP_CONTROL1_BASE_IDX                                                             2
mmDIG0_AFMT_RAMP_CONTROL1_BASE_IDX 9787 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDIG0_AFMT_RAMP_CONTROL1_BASE_IDX                                                             2