mmDC_MEM_GLOBAL_PWR_REQ_CNTL 1193 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDC_MEM_GLOBAL_PWR_REQ_CNTL                                            0x132
mmDC_MEM_GLOBAL_PWR_REQ_CNTL 1005 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDC_MEM_GLOBAL_PWR_REQ_CNTL                                            0x132
mmDC_MEM_GLOBAL_PWR_REQ_CNTL 1079 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDC_MEM_GLOBAL_PWR_REQ_CNTL                                            0x132
mmDC_MEM_GLOBAL_PWR_REQ_CNTL  744 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDC_MEM_GLOBAL_PWR_REQ_CNTL                                                                   0x0072
mmDC_MEM_GLOBAL_PWR_REQ_CNTL  544 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDC_MEM_GLOBAL_PWR_REQ_CNTL                                                                   0x0072
mmDC_MEM_GLOBAL_PWR_REQ_CNTL  188 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDC_MEM_GLOBAL_PWR_REQ_CNTL                                                                   0x0072
mmDC_MEM_GLOBAL_PWR_REQ_CNTL  202 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDC_MEM_GLOBAL_PWR_REQ_CNTL                                                                   0x0072