mmDC_I2C_INTERRUPT_CONTROL_BASE_IDX 1641 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDC_I2C_INTERRUPT_CONTROL_BASE_IDX                                                            2
mmDC_I2C_INTERRUPT_CONTROL_BASE_IDX 7672 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDC_I2C_INTERRUPT_CONTROL_BASE_IDX                                                            2
mmDC_I2C_INTERRUPT_CONTROL_BASE_IDX 10293 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDC_I2C_INTERRUPT_CONTROL_BASE_IDX                                                            2
mmDC_I2C_INTERRUPT_CONTROL_BASE_IDX 9263 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDC_I2C_INTERRUPT_CONTROL_BASE_IDX                                                            2