mmDC_I2C_INTERRUPT_CONTROL 7158 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDC_I2C_INTERRUPT_CONTROL                                              0x16d6
mmDC_I2C_INTERRUPT_CONTROL 7347 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDC_I2C_INTERRUPT_CONTROL                                              0x16d6
mmDC_I2C_INTERRUPT_CONTROL 8740 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDC_I2C_INTERRUPT_CONTROL                                              0x16d6
mmDC_I2C_INTERRUPT_CONTROL 1640 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDC_I2C_INTERRUPT_CONTROL                                                                     0x1586
mmDC_I2C_INTERRUPT_CONTROL 1336 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDC_I2C_INTERRUPT_CONTROL 0x181B
mmDC_I2C_INTERRUPT_CONTROL 3544 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDC_I2C_INTERRUPT_CONTROL                                              0x181b
mmDC_I2C_INTERRUPT_CONTROL 7671 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDC_I2C_INTERRUPT_CONTROL                                                                     0x1e9a
mmDC_I2C_INTERRUPT_CONTROL 10292 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDC_I2C_INTERRUPT_CONTROL                                                                     0x1e9a
mmDC_I2C_INTERRUPT_CONTROL 9262 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDC_I2C_INTERRUPT_CONTROL                                                                     0x1e9a