mmDC_I2C_DDC3_HW_STATUS_BASE_IDX 1649 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDC_I2C_DDC3_HW_STATUS_BASE_IDX                                                               2
mmDC_I2C_DDC3_HW_STATUS_BASE_IDX 7680 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDC_I2C_DDC3_HW_STATUS_BASE_IDX                                                               2
mmDC_I2C_DDC3_HW_STATUS_BASE_IDX 10301 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDC_I2C_DDC3_HW_STATUS_BASE_IDX                                                               2
mmDC_I2C_DDC3_HW_STATUS_BASE_IDX 9271 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDC_I2C_DDC3_HW_STATUS_BASE_IDX                                                               2