mmDC_I2C_DDC1_HW_STATUS_BASE_IDX 1645 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDC_I2C_DDC1_HW_STATUS_BASE_IDX                                                               2
mmDC_I2C_DDC1_HW_STATUS_BASE_IDX 7676 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDC_I2C_DDC1_HW_STATUS_BASE_IDX                                                               2
mmDC_I2C_DDC1_HW_STATUS_BASE_IDX 10297 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDC_I2C_DDC1_HW_STATUS_BASE_IDX                                                               2
mmDC_I2C_DDC1_HW_STATUS_BASE_IDX 9267 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDC_I2C_DDC1_HW_STATUS_BASE_IDX                                                               2