mmDC_GPU_TIMER_READ_CNTL 1585 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDC_GPU_TIMER_READ_CNTL                                                0x482c
mmDC_GPU_TIMER_READ_CNTL 1410 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDC_GPU_TIMER_READ_CNTL                                                0x482c
mmDC_GPU_TIMER_READ_CNTL 1490 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDC_GPU_TIMER_READ_CNTL                                                0x482c
mmDC_GPU_TIMER_READ_CNTL 1884 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDC_GPU_TIMER_READ_CNTL                                                                       0x20aa
mmDC_GPU_TIMER_READ_CNTL 1278 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDC_GPU_TIMER_READ_CNTL 0x192A
mmDC_GPU_TIMER_READ_CNTL 1298 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDC_GPU_TIMER_READ_CNTL                                                0x192a
mmDC_GPU_TIMER_READ_CNTL 1076 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDC_GPU_TIMER_READ_CNTL                                                                       0x0129
mmDC_GPU_TIMER_READ_CNTL  750 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDC_GPU_TIMER_READ_CNTL                                                                       0x0129
mmDC_GPU_TIMER_READ_CNTL  712 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDC_GPU_TIMER_READ_CNTL                                                                       0x0129