mmDC_GPU_TIMER_READ_BASE_IDX 1883 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDC_GPU_TIMER_READ_BASE_IDX                                                                   2
mmDC_GPU_TIMER_READ_BASE_IDX 1075 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDC_GPU_TIMER_READ_BASE_IDX                                                                   2
mmDC_GPU_TIMER_READ_BASE_IDX  749 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDC_GPU_TIMER_READ_BASE_IDX                                                                   2
mmDC_GPU_TIMER_READ_BASE_IDX  711 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDC_GPU_TIMER_READ_BASE_IDX                                                                   2