mmDC_GPIO_DDC5_MASK_BASE_IDX 2001 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDC_GPIO_DDC5_MASK_BASE_IDX                                                                   2
mmDC_GPIO_DDC5_MASK_BASE_IDX 10528 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDC_GPIO_DDC5_MASK_BASE_IDX                                                                   2
mmDC_GPIO_DDC5_MASK_BASE_IDX 12839 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDC_GPIO_DDC5_MASK_BASE_IDX                                                                   2
mmDC_GPIO_DDC5_MASK_BASE_IDX 11409 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDC_GPIO_DDC5_MASK_BASE_IDX                                                                   2