mmDCPG_INTERRUPT_STATUS_BASE_IDX  959 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDCPG_INTERRUPT_STATUS_BASE_IDX                                                               2
mmDCPG_INTERRUPT_STATUS_BASE_IDX  891 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDCPG_INTERRUPT_STATUS_BASE_IDX                                                               2
mmDCPG_INTERRUPT_STATUS_BASE_IDX  555 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDCPG_INTERRUPT_STATUS_BASE_IDX                                                               2
mmDCPG_INTERRUPT_STATUS_BASE_IDX  517 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDCPG_INTERRUPT_STATUS_BASE_IDX                                                               2