mmDCPG_INTERRUPT_CONTROL_1  892 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmDCPG_INTERRUPT_CONTROL_1                                                                     0x00ab
mmDCPG_INTERRUPT_CONTROL_1  558 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmDCPG_INTERRUPT_CONTROL_1                                                                     0x00af
mmDCPG_INTERRUPT_CONTROL_1  520 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmDCPG_INTERRUPT_CONTROL_1                                                                     0x00af