mmDCPG_INTERRUPT_CONTROL   40 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDCPG_INTERRUPT_CONTROL                                                0x2df
mmDCPG_INTERRUPT_CONTROL   46 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDCPG_INTERRUPT_CONTROL                                                0x2df
mmDCPG_INTERRUPT_CONTROL  960 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDCPG_INTERRUPT_CONTROL                                                                       0x00a7