mmDCP5_DVMM_PTE_CONTROL 3033 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDCP5_DVMM_PTE_CONTROL                                                 0x448a
mmDCP5_DVMM_PTE_CONTROL 4271 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDCP5_DVMM_PTE_CONTROL                                                 0x448a
mmDCP5_DVMM_PTE_CONTROL 7638 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDCP5_DVMM_PTE_CONTROL                                                                        0x0fd0