mmDCP1_OUTPUT_CSC_CONTROL 2799 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDCP1_OUTPUT_CSC_CONTROL                                               0x1c3c
mmDCP1_OUTPUT_CSC_CONTROL 2553 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDCP1_OUTPUT_CSC_CONTROL                                               0x1c3c
mmDCP1_OUTPUT_CSC_CONTROL 3784 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDCP1_OUTPUT_CSC_CONTROL                                               0x1c3c
mmDCP1_OUTPUT_CSC_CONTROL 4386 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDCP1_OUTPUT_CSC_CONTROL                                                                      0x0781
mmDCP1_OUTPUT_CSC_CONTROL 1741 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDCP1_OUTPUT_CSC_CONTROL 0x1D3C
mmDCP1_OUTPUT_CSC_CONTROL 1950 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDCP1_OUTPUT_CSC_CONTROL                                               0x1d3c