mmDCP1_INPUT_CSC_CONTROL 2750 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDCP1_INPUT_CSC_CONTROL                                                0x1c35
mmDCP1_INPUT_CSC_CONTROL 2504 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDCP1_INPUT_CSC_CONTROL                                                0x1c35
mmDCP1_INPUT_CSC_CONTROL 3735 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDCP1_INPUT_CSC_CONTROL                                                0x1c35
mmDCP1_INPUT_CSC_CONTROL 4372 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDCP1_INPUT_CSC_CONTROL                                                                       0x077a
mmDCP1_INPUT_CSC_CONTROL 1728 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDCP1_INPUT_CSC_CONTROL 0x1D35
mmDCP1_INPUT_CSC_CONTROL 1901 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDCP1_INPUT_CSC_CONTROL                                                0x1d35