mmDCP0_REGAMMA_CONTROL 3379 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDCP0_REGAMMA_CONTROL                                                  0x1aa0
mmDCP0_REGAMMA_CONTROL 3140 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDCP0_REGAMMA_CONTROL                                                  0x1aa0
mmDCP0_REGAMMA_CONTROL 4371 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDCP0_REGAMMA_CONTROL                                                  0x1aa0
mmDCP0_REGAMMA_CONTROL 3764 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDCP0_REGAMMA_CONTROL                                                                         0x05e0
mmDCP0_REGAMMA_CONTROL 1632 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDCP0_REGAMMA_CONTROL 0x1AA0
mmDCP0_REGAMMA_CONTROL 2600 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDCP0_REGAMMA_CONTROL                                                  0x1aa0