mmDCP0_INPUT_GAMMA_CONTROL 2490 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h #define mmDCP0_INPUT_GAMMA_CONTROL                                              0x1a10
mmDCP0_INPUT_GAMMA_CONTROL 2384 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h #define mmDCP0_INPUT_GAMMA_CONTROL                                              0x1a10
mmDCP0_INPUT_GAMMA_CONTROL 3615 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h #define mmDCP0_INPUT_GAMMA_CONTROL                                              0x1a10
mmDCP0_INPUT_GAMMA_CONTROL 3560 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmDCP0_INPUT_GAMMA_CONTROL                                                                     0x0569
mmDCP0_INPUT_GAMMA_CONTROL 1566 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h #define mmDCP0_INPUT_GAMMA_CONTROL 0x1A10
mmDCP0_INPUT_GAMMA_CONTROL 1641 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h #define mmDCP0_INPUT_GAMMA_CONTROL                                              0x1a10